The present invention relates to the formation of semiconductor devices. More particularly, the invention relates to the formation of semiconductor devices with fin structures.
In a semiconductor-based device (e.g., integrated circuits or flat panel displays), fin structures may be used in various devices. For example, a finFET is a MOSFET built on a SOI substrate on which silicon is etched into a fin shaped body of the transistor. A gate is wrapped around and over the fin structure.
Spacer lithography may be one way of creating fins. In one way of doing this, a sacrificial layer is provided and then etched to form sacrificial structures. A conformal CVD is then used to form a conformal layer over and around the sacrificial structures. An etch back is used to etch the horizontal layers of the conformal layer. The sacrificial structure is then removed to form fin structures. The thickness of the fins may be 10 nm or less. To provide a desired conformal layer, the conventional CVD deposition may require a high temperature CVD. Such high temperatures may be detrimental to the semiconductor device. The high temperature may cause a process to go beyond a device thermal budget. In addition, if doping has previously been done, the high temperature may be detrimental to the doped areas.
In addition, such CVD fin processes are limited with regards to the sacrificial layer and fin. Generally, a sacrificial layer of silicon oxide would provide a fin of silicon nitride. A sacrificial layer of silicon nitride would provide a sacrificial layer of silicon oxide.
Furthermore, forming fin structures with conformal CVD processes places very stringent requirements on the profile of the sacrificial structures. The profile angle would need to be very close to vertical. A slight deviation from vertical profile would cause the fin structure to tilt, causing potential defect problems and CD variations.